DspEdu 2.1

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Introduction

A Single-phase Current Injection type Active Power Filter

Current Control Schemes Suitable for Active Power Filter

The D.C Voltage Control Loop

The Harmonic Calculator

Simulation of a Single-phase Active Power Filter

Simulation Results

Shunt Active Filter for Reactive Compensation
 

[ This article was prepared for a short-term course offered by Department of Electrical Engg.,NIT Calicut in 1998 and subsequently modified in 2000 and 2003.]

1.  Introduction

The increasing use of power electronics-based loads (adjustable speed drives, switch mode power supplies, etc.) to improve system efficiency and controllability is increasing the concern for harmonic distortion levels in end use facilities and on the overall power system. The application of passive tuned filters creates new system resonances which are dependent on specific system conditions. In addition, passive filters often need to be significantly overrated to account for possible harmonic absorption from the power system. Passive filter ratings must be co-ordinated with reactive power requirements of the loads and it is often difficult to design the filters to avoid leading power factor operation for some load conditions. Active filters have the advantage of being able to compensate for harmonics without fundamental frequency reactive power concerns. This means that the rating of the active power can be less than a comparable passive filter for the same non-linear load and the active filter will not introduce system resonances that can move a harmonic problem from one frequency to another.

The active filter concept uses power electronics to produce harmonic current components that cancel the harmonic current components from the non-linear loads. The active filter uses power electronic switching to generate harmonic currents that cancel the harmonic currents from a non-linear load. The active filter configuration investigated in this lecture is based on a pulse-width modulated (PWM) voltage source inverter that interfaces to the system through a system interface filter as shown in Figure 1. In this configuration, the filter is connected in parallel with the load being compensated. Therefore, the configuration is often referred to as an active parallel or shunt filter. Figure 1 illustrates the concept of the harmonic current cancellation so that the current being supplied from the source is sinusoidal. The voltage source inverter used in the active filter makes the harmonic control possible. This inverter uses dc capacitors as the supply and can switch at a high frequency to generate a signal that will cancel the harmonics from the non-linear load.

The active filter does not need to provide any real power to cancel harmonic currents from the load. The harmonic currents to be cancelled show up as reactive power. Reduction in the harmonic voltage distortion occurs because the harmonic currents flowing through the source impedance are reduced. Therefore, the dc capacitors and the filter components must be rated based on the reactive power associated with the harmonics to be cancelled and on the actual current waveform (rms and peak current magnitude) that must be generated to achieve the cancellation.

The current waveform for cancelling harmonics is achieved with the voltage source inverter in the current controlled mode and an interfacing filter. The filter provides smoothing and isolation for high frequency components. The desired current waveform is obtained by accurately controlling the switching of the insulated gate bipolar transistors (IGBTs) in the inverter. Control of the current waveshape is limited by the switching frequency of the inverter and by the available driving voltage across the interfacing inductance.

The driving voltage across the interfacing inductance determines the maximum di/dt that can be achieved by the filter. This is important because relatively high values of di/dt may be needed to cancel higher order harmonic components. Therefore, there is a trade-off involved in sizing the interface inductor. A larger inductor is better for isolation from the power system and protection from transient disturbances. However, the larger inductor limits the ability of the active filter to cancel higher order harmonics.

The Inverter (three-phase unit or single-phase unit as the case may be) in the Shunt Active Power Filter is a bilateral converter and it is controlled in the Current Regulated mode i.e. the switching of the Inverter is done in such a way that it delivers a current which is equal to the set value of current in the current control loop. This mode of operation of a PWM-VSI has been covered in detail in an earlier lecture. Thus the basic principle of Shunt Active Power Filter is that it generates a current equal and opposite in polarity to the harmonic current drawn by the load and injects it to the point of coupling thereby forcing the source current to be pure sinusoidal. This type of Shunt Active Power Filter is called the Current Injection Type APF.

2.  A Single Phase Current Injection Type Active Power Filter

Single-Phase topology is assumed for purposes of explanation for the sake of simplicity. Whatever is covered here will be equally applicable for three-phase systems also with minor modifications. A simplified diagram of a single-phase APF is given in Fig.2 below.

The control system maintains the average voltage across the capacitor constant against variations in line and filtering load on the APF.The Inverter is gated in such a way that the current I_L follows a reference current waveform set by the concerned control system. The voltage required at the terminals of Inverter output will be automatically made suitable for maintaining the required current in the L_f line,i.e. the Inverter is controlled in the 'current regulated' mode. The current delivered by the source I_s = I_o - I_L and it is desired that this current be a pure sinusoidal wave even when the load draws a highly distorted current wave. This is accomplished by making I_L equal to the harmonic current required by the load. Thus,there has to be a harmonic current calculator which will calculate the harmonic current to be generated by the Inverter in order to maintain the source current harmonic free. Under a loss free situation, the Inverter does not need to draw any active power. However,there will be losses in the resistances of inductor,switches etc. and switching losses when the Inverter is generating current. Unless these losses are compensated , the capacitor voltage will come down steadily. Hence the control of capacitor voltage involves drawing an in phase sinusoidal component of current from the source along with the required harmonic currents, i.e. the reference current for I_L should contain an appropriate amount of 180⁰ component to maintain the D.C voltage across the capacitor.

It is indeed possible to make the Inverter deliver the reactive current demanded by the load along with its harmonic current requirement by providing suitable reference. In that case APF becomes an SVC -cum-APF or an APF-cum-SVC.In fact,it should by now be clear that, whether it does reactive compensation or not, the operation and control of this APF is almost the same as that of the SVC with Current Regulated Control. The basic principles involved are the same. But, usually in an SVC harmonic filtering is not attempted along with Fundamental frequency VAr compensation since the range of switching frequencies needed for APF action is much higher than the frequency needed for SVC action. The kVAr rating of SVC for a load will be much higher than the kVA rating needed for an APF.Hence it is better to use a small kVA rated Inverter with high switching frequency(thereby demanding IGBTs/MOSFETs) for the APF function and a high power Inverter with low switching frequency for ( thereby permitting the use of thyristors and GTOs) for SVC action. In fact , if the two jobs are separated this way,it is possible to run the SVC at a still lower frequency with the APF helping to cancel the harmonics generated by the low frequency switching of SVC partially. Such systems have been made at subtransmission level. Notwithstanding the above, the continuous improvement in the voltage and current ratings of IGBTs and MOSFET power modules has made it possible to combine both SVC and APF functions in the same Inverter at distribution levels(i.e. at 440V,1.1kV,3.3kV,6.6kV and 11kV levels).

The control of a single-phase APF using hysterisis current control is given in Fig.3.The D.C voltage across the capacitor is sensed,compared with reference and the error is processed in a PI controller. This error multiplies a fixed amplitude sine wave which is pure and is in 180⁰ phase with the source. The product forms one component of the current reference of the Inverter.The harmonic current calculator receives the load current signal from the CT in the load line and a pure sine wave template from the control system and calculates the harmonic current component in the load in real time. The output of this calculator forms the second component of reference current. These two components are added together and given as current reference into a hysterisis current controller.

3.  Current Control Schemes Suitable for APF

The block diagram above assumed hysteresis current control and hysteresis current control is indeed suitable if only low order harmonics (like 3^rd ,5^th,7^th etc.) need be compensated. However,if harmonics upto 25^th or so are to be cancelled ,hysteresis control will require excessively high switching frequency. In addition, the variation in switching frequency which is basic to hysteresis control makes it difficult to choose filter components. Hence constant switching frequency,unipolar switching schemes are preferred for implementing current control of Inverter in APF application as a rule.

In one constant switching frequency current control scheme,the filter inductor current is sensed and compared directly with the reference current to form the current error. This error is amplified and used as the modulating signal in the unipolar pulse width modulator which controls the gating of switches. This scheme suffers from some disadvantages. First,the current sensed will have switching ripple in it and it will have to be filtered before getting into the high gain error amplifier. This filtering introduces a time delay. Already the system is of second order due to the L_f and C_f .This second order dynamics has sharp phase angle variation near its resonance frequency due to its underdamped nature. In addition, the phase delay contributed by it depends strongly on the operating condition. Now if a high gain stage with a first order filter is put in the feedback path , the system easily becomes unstable. Even if it is stable, its transient response will not be satisfactory. This will call for reduction of gain in the error amplifier which will affect the ability of the APF to track the reference current adversely. If a high gain has to be used then a high switching frequency becomes mandatory. Secondly,the current that is being sensed is current in a switching system and will be corrupted by the inevitable high frequency switching noise. The control loop usually gets thoroughly upset with this noisy feedback.

These limitations of feedback control scheme provided the motivation for the development of a feed-forward control scheme for the control of current in the Inverters.The principle of this scheme follows.

Assuming the control is successful,the current that will flow through L_f is known apriori and it is equal to the reference current. Then,if the I_L value is known before hand ,the voltage that the Inverter should generate in order to make this current flow can be calculated and the calculation result(a voltage signal) can be given as the modulating signal for the unipolar PWM generator. The voltage that the Inverter should generate is given below by applying K.V.L.

V_inv = V_ac + RI_ref + L_f (dI_ref /dt) where I_ref is the current commanded by the control system,R is the equivalent loss resistance(includes winding resistance,switch power loss etc.) , L_f is the filter inductance and V_ac is the source voltage. A simple Opamp circuit can implement the above equation by accepting a stepped down version of source voltage and the reference current signal as the inputs .The output of the circuit is given to the unipolar PWM circuit after suitable scaling. Then the Inverter generates the right voltage and hence the current in L_f will have to be I_ref.

However, this requires the knowledge of accurate values of R and L_f.The value of R is operating point dependent (through switch power losses) and can not be known accurately. If these values are precisely known the current control would have been 'free of dynamics' i.e.,the bandwidth of current control loop would have been infinite. But there are inaccuracies in the estimation of the parameters and inaccuracies in the measurement of V_ac.Also the differentiator operation has to be band limited in practise due to the well known sensitivity of differentiator to noise and high frequency signals. These imperfections make the current control logic deviate from the ideal and a small amount of actual current feedback will be needed along with the other components to correct the minor deviations. However, now the role of current feedback is only to correct second order effects and hence can be of low gain. Moreover, for the same reason no filtering is needed in the feedback path. With this term added ,the Inverter voltage control equation becomes:

V_inv = V_ac + RI_ref + L_f (dI_ref /dt) +K ( I_ref - I_L ) where K is the feedback gain and is usually very small. This scheme is capable of rise time of 50m s -250 m s and yields a high bandwidth current control loop which is highly desirable in APF since APF is expected to track up to 25^th harmonic and more.

K is the feedback gain,Kpwm is the gain of Inverter and Z₀(s) is the equivalent load impedance connected at the a.c source point.

4.  The D.C Voltage Control Loop

The D.C voltage control loop in APF is similar to the D.C control loop of Active Line Conditioners or PWM Rectifiers , Static VAr Compensators etc, and similar considerations apply.

The instantaneous power input into the inverter (due to harmonic currents, fundamental active current needed to supply the inverter losses and fundamental reactive power if static Var compensation is also being performed) from mains will get balanced by (i) the dissipation in the inverter and capacitor (ii) the rate of change of stored energy in the inverter passive filter reactive elements and (iii) rate of change of stored energy in the DC Side Capacitor. The inverter losses and the power that goes into changing the energy storage in the small filter elements may be ignored in a first order qualitative analysis and we may say that to a good approximation the instantaneous power that goes into the inverter reaches the DC Side capacitor. Fundamental current flow (which will be a small active component if no shunt Var compensation is being done) will result in second harmonic pulsations in the inverter input power and this should lead to second harmonic voltage components appearing across DC side capacitor. Harmonic current flow into inverter similarly will give rise to higher harmonic voltage ripples in the DC Side Capacitor.The second harmonic ripple in voltage across the DC Side capacitor can cause some difficulty in the DC voltage control loop.The problem becomes significant if the inverter is doing VAr control as well as harmonic control.

When the DC Side voltage is sensed , compared with a set reference and the error is amplified the second harmonic (and higher harmonics in capacitor voltage) get amplified and appear at the output of the error amplifier.The second harmonic at the error amplifier output results in a third harmonic component appearing in the reference current and this will lead to injection of third harmonic current in the line.The DC Side voltage will have to be filtered to remove the second harmonic to prevent this.This filtering will invariably slow down the DC voltage control loop which in turn will call for a higher value of DC side capacitance.

However, since the 50 Hz current in the Inverter line of an APF is small ,the DC side capacitor will not have much second harmonic ripple and hence not much filtering is required on this voltage before it gets into the control loop if the APF will never be required to do static VAr compensation too. By the same reason, the D.C loop control can be faster in APF compared to APLC,SVC or Switched Mode Rectifier.

5.  The Harmonic Current Calculator

This is the most important component in the control system. It accepts the load current and sinusoidal templates from the PLL-Sine wave generator and returns the value of harmonic content of the load current for further control purposes. The D.C side capacitor should not be asked to supply even a fraction of the active power required by the load since it will run down rapidly if that happens. Hence, the Calculator must ensure that neither under steady state nor under load transient conditions the calculated current will contain an active fundamental component. However, it is not possible to ensure this under transient conditions strictly. Then the Calculator must reduce the active component to zero as fast as possible. Any delay on the part of this Calculator in removing the active power component in its output will be translated as higher and higher value for the D.C side capacitor especially considering the unavoidable filtering in the DC voltage control loop.

The method for extracting the reactive fundamental component contained in a sinusoidal current is based on extraction of orthogonal fundamental frequency components from the waveform. The sensed load current is multiplied with unit amplitude sine and cosine waves (produced by PLL + EPROM method). The products are integrated over one half cycle. The value of integrated outputs are sampled and held at the end of the half cycle period and after sampling the integrators are reset briefly to start the next cycle of integration. The sampled outputs will be the amplitude of active and reactive component respectively. The unit sine and cosine templates are multiplied by these amplitudes to re-create the active and reactive fundamental components and their sum is subtracted from the total load current. The result will be the instantaneous harmonic content in the load current and this is sent to the output. Obviously, the maximum delay in the calculation is one half-cycle time.This method of harmonic component calculation is insensitive to the presence of harmonics in supply voltage.If the both the supply voltage and load current contain harmonics it is possible that some active power transfer is taking place through harmonics.Then these active power components will be missed out by this calculator ; but then the voltage control loop will handle this. However this method is sensitive to supply frequency and component tolerances and can result in wrong estimates of harmonic components if frequency varies over a wide range.

The low pass filter in this scheme has to be of very low bandwidth , otherwise the second harmonic that comes through will manifest as third harmonic in the line current.But then a low bandwidth in the LPF will make the circuit very slow and when a sudden load change takes place all the load current will come through in name of "harmonics" because of delayed response of LPF.This will lead to inverter trying to support the load active power for too long - the result is too heavy a value for the DC Side Capacitor.
The two methods of harmonic extraction described above were compared by PSpice Simulation.The outputs when a 1Volt amplitude 50 Hz pure sine wave was applied are shown below.The differences are clear.

6.  Simulation of a Single Phase Active Power Filter

The Design Lab Simulation diagram for the simulation of a 0.5kVA Active Power Filter of Current Injection type is given below.

The APF simulated uses a 230V,50Hz,500VA Single Phase Full Bridge Inverter using IRFP450 MOSFETs as the power converter. An inductance of 1mH and a shunt connected capacitance of 2 uF carry out the filtering of inverter output to remove the switching frequency components. The output of the inverter is tied to the a.c supply and a non-linear load is supplied from the point of common coupling. The Inverter uses unipolar PWM using triangular carrier of 20kHz.The inverter works in the current regulated mode using feed forward method of current control.

There are two ‘time dimensions’ involved in simulating a power electronic system of this kind in Pspice. One is the period of switching in the inverter and the other is the characteristic time constants involved in the rest of the control loops. These time constants could be in 10’s or 100’s of milliseconds. Simulating the switching behaviour of an inverter in PSpice will require very small time steps due to the switching transients in MOSFETs and IGBTs taking place in the nano second time range. Such a simulation long enough to cover at least one full cycle of 50 Hz output in the case of a unipolar modulated inverter using 20kHz triangle carrier will take 10’s of minutes for completion. And long duration simulations at small time steps will usually encounter convergence problems in Pspice. The outer control loop dynamics on the otherhand proceeds slowly compared to the switching frequency. Thus simulation over many a.c cycles will be needed to catch dynamics of interest in systems of the type described here. Obviously one cannot retain all the details of the inverter and simulate for many a.c cycles.

The solution to this problem of excessively large simulation time and frequent convergence problem lies in decoupling the two ‘time dimensions’. Two separate simulation models are to be derived for this. In the first the inverter along with its gating control logic alone will be simulated with time step suitable for the switching frequency. The simulation schematic will be same as the circuit diagram of the inverter with all components and details. The simulation will be carried out for one or two cycles of a.c for different loading on the inverter. The loading is arranged to represent the actual loading on the inverter when the inverter becomes part of APF. The aim of this separate simulation of inverter in a stand alone mode is two fold. Primarily, the aim is to verify the operation of electronic circuits and drivers (pulse transformer based , opto based as the case may be) used in gating logic and to verify various critical issues like sufficiency of dead time designed into gating logic etc. Secondly stand alone simulation of inverter is used to estimate the total losses taking place in the inverter under various load conditions. Based on the loss data the equivalent loss resistance of the inverter can be worked out. This value of equivalent inverter loss resistance is needed to simulate the dynamic behaviour of APF and to design proper compensators in the APF control loops. Such a simulation was carried out and the loss resistance was found to be 0.2 ohms. This value is used in the simulation diagram in Fig.4

The second simulation model is used to simulate the dynamics of the complete system. The switching frequency domain is eliminated in this model by using an ‘average’ model for the inverter. The time constants involved in dynamics are usually lage compared to switching period in the inverter and hence nothing much happens in the dynamics during one switching period. The dynamics responds to a sort of averaged effect of the switching taking place in the inverter. In the present simulation the principle of Power Balance is used on the inverter to arrive at an averaged model for the inverter. The a.c side power and d.c side power in the case of an inverter will have to be equal within losses and changes in reactive energy storages. But the reactive components in the inverter will be small value due to high frequency switching and the rate of change of their energy storage can be ignored in a first order model. Then the a.c side power and d.c side power will be equal within the loss in the inverter equivalent resistance.

In the simulation model shown in Fig.4,the inverter output is modelled as a voltage controlled voltage source with saturation behaviour. The input side i.e, the d.c capacitor side modelled by implementing power balance through an ABM block. The ABM block senses the inverter a.c side current, multiplies it by inverter output voltage and divides the product by the d.c side capacitor voltage. Using power balance principle it can be seen that the result of this calculation will be the capacitor current. ABM block output is a current and this is fed into the capacitor node. The sensing points avoid the inverter loss resistance.

The load current is sensed and its harmonic content waveform is calculated by the harmonic calculator block shown in Fig.5. This block implements the harmonic current calculation algorithm described earlier.

The d.c capacitor voltage is compared with a set value and the error is processed in an opamp based PI controller. The PI Controller output multiplied by unit amplitude sine wave becomes the active current reference. The total current reference is formed by adding the harmonic calculator block output and the active current component.

The reference current which comes out as a voltage signal in the simulation diagram is converted into a current by the G device and the current is pushed into an impedance representing the net impedance between the inverter and the a.c supply. The drop in the impedance added to the a.c supply voltage will have to be the output voltage synthesised by inverter. Thus inverter control voltage is obtained by scaling this voltage suitably.

The load circuits contain standard rectifies/thyristors to simulate a non-linear current load. Two switches with controllable ON/OFF instants are included to simulate the load-switching transients on the APF.

7.  Simulation Results

Case-1 Rectifier Load 300W with 330uF Capacitor Filter switched on at t=0 and switched off at t=100ms and line at 230V r.m.s

Fig.6 shows the simulation waveforms in this case.

The source current is seen to be a good sine wave. The rectifier stops drawing load current at t=100ms.However the effect of this will be felt in the current control loop since the feed back is based on a sampling scheme. The information on how much active power and reactive power were drawn by the load in an a.c cycle will be available only at the end of that cycle in the harmonic current calculator block. In other words there is a maximum of one cycle delay between change in load current and change in the harmonic current calculated by the harmonic current calculator. Hence the source current continues to be at the same old level for one more cycle after the 100ms point. But, now since there is no load to absorb this power it will go into inverter and charge up the d.c side capacitor. This is clearly seen in the capacitor voltage waveform. The set value of capacitor voltage is 400V and as the capacitor approaches that level the source current tapers down to zero. Close examination of the source voltage and source current waveforms reveal that there is a sudden phase change of 180 deg in source current at 120ms and that after that time point the power flow is into the source. It is as it should be since the capacitor is overcharged now and the system has to pump energy back into the source in order to bring the capacitor back to its set value.

Fig.7 shows the spectral analysis of the relevant currents when the 300W rectifier was drawing power. The low frequency harmonics in source current are in the 10-50mA range indicating almost pure sine wave current. Note that the inverter current and the rectifier current are harmonic rich.

The simulation model employed makes an assumption that whatever voltage is demanded of the inverter by the current regulation loop can really be synthesised by the inverter. This is not true. The maximum voltage that an inverter can synthesise is equal to the d.c side voltage theoretically. But there are restrictions on minimum and maximum pulse widths that can be realised in an inverter practically. Due to these restrictions the practical inverter can utilise only a maximum of 95% of d.c voltage. These practical limits are ignored in this simulation and it is assumed that the inverter can utilise the d.c side voltage fully. This is why there is a limiter set at ± 380V in the inverter model. This assumes that d.c side is maintained at 400V.But during transients d.c voltage varies. Hence after simulation run is over the result should be checked to see that at no time the inverter synthesised voltage was above the capacitor voltage. In case-1 the maximum inverter demand was 360V and the capacitor voltage never went below 382Volts.Hence the simulation results for case-1 will be acceptable.

Fig.8 shows the simulation output. The load waveform has sharp change at the firing instant due to low level of smoothing inductance (the load circuit time constant was 20uS) in the d.c side. Inverter has to absorb this sudden change in current if the supply current is to become pure sine. But if the inverter current changes suddenly the filter inductance will demand a very high voltage. This high voltage can not be supplied by the inverter due to limited value of d.c side voltage. Hence the inverter output goes to the maximum possible and gets clamped there as evident in the form of narrow pulses in the waveform in fig.8. Thus the inductance gets only a limited voltage (the difference between maximum inverter output and peak supply voltage) and hence its current slews up only gradually. This results in the supply line taking the sudden changes in load current which is clearly visible in the supply current waveform in Fig.8.Thyristor converter fed resistive load is the most demanding load on an Active Power Filter and waveform improvement on supply side will be only partial as illustrated in this case study.

In this case also the capacitor voltage was verified to be above the inverter output at all time and hence simulation results are acceptable.

Case-3 Same as in case – 2 but the load circuit time constant was changed to 200uS.

Fig.9 shows the relevant waveforms in this case. The source current is seen to be almost pure sine wave in this case.

It is possible to control the power factor at the load bus by varying the amount of reactive power injection by the shunt active filter (within its capability range). A reactive power control loop which calculates the amplitude of load reactive power, and controls the reactive current reference of the active filter to be exactly the opposite of the load reactive power will be needed for this. Load reactive power is calculated by product-integrate-sample every 10ms-reset strategy described earlier.

A PSpice simulation diagram for this scheme is given in Fig. 10 and PSpice simulation diagram for the Shunt APF as a Reactive Compensator is given in Fig. 11.

The results of simulation for a RL load with APF enabled at 110ms (by using "Gate" block in Fig. 11 ) is shown below.The rapid change in source current and its near unity power factor may be noted.The power factor is not exactly upf because of the fundamental reactive power taken by the filter capacitor across the inverter output which was not accounted for anywhere in the control loops.

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