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The Circuit Used for Rectification

Data for DUT

Test Results

Supply Current Waveform

Lamp Current Symmetry and Crest Factor

Glow Discharge Period

Open Circuit Voltage Test

Lamp Removal Test

Lamp Fails to Start Test
 

 


AN ELECTRONIC BALLAST FOR 40W FLUORESCENT  LAMP
WITH HIGH INPUT POWER FACTOR - TEST RESULTS


Articles in Electrical Engineering from Suresh Kumar K.S
 
 

Suresh Kumar. K.S.
Department of Electrical Engineering
National Institute of Technology Calicut
Calicut-673601, Kerala State , India

   Electronic Ballasts for 40W Fluorescent Lamps rectify the line using a full-bridge diode rectifier follwed by a d.c holding capacitor. A high frequency self-oscillating inverter runs from this d.c bus providing high frequency a.c voltage (usually 20kHz) to the lamp. The inverter is of half-bridge type with the capacitors used in the half-bridge voltage splitting system , a ferrite core inductor and the lamp forming an underdamped resonant load on the inverter.

   Special control ICs and Power factor corrected front-end designs are available for this application. However these hadn't been adopted by the manufactures in Kerala State in India in 1999. In 1999 ,a particular manufacturer in Kerala State brought out a new design that employed a passive rectifier front end and yet claimed high power factor operation at the input side. The manufacturer wanted a test report on the new design. The required testing was carried out by me as a part of consultancy activities of Energy Audit Cell at NIT Calicut in 1999. This article presents the test results briefly. Also a brief exposure on the ac-dc conversion circuit used in the unit is provided along with pSpice simulation results illustrating the operation of the circuit.

1. The Circuit used in the unit for rectification

   The circuit employed is shown below. A 1k resistance is used as the load instead of the lamp and inverter to explain the operation. The 3mH inductance represents the source impedance at the point of connection. Other component values are as found in the DUT.

   When the source voltage magnitude is less than the  capacitor voltages (voltage of Cbulk1 and Cbulk2) , the rectifier diodes (all of them) and the diode Dcharging  will be reverse biased and output voltage will be decided by Cbulk1 and Cbulk2 . These two capacitors will deliver current to the load through Dout1 and Dout2 , sharing current equally and they will have a common voltage then. Rectifier diode currents will be zero and the input current is zero. This is Mode-1 of circuit operation.

   When the source voltage magnitude is more than the  capacitor voltages (voltage of Cbulk1 and Cbulk2) but less than the sum of the two capacitor voltages, the rectifier diodes (Diode1 and Diode3 in positive half cycle, Diode2 and Diode4 in the negative half cycle) will be forward biased and conducting. But the diode, Dcharging,  will be reverse biased. Now the output voltage will be decided by the a.c source and will follow the sine wave.The a.c source will deliver the load current during this period. The diodes Dout1 and Dout2 will be reverse biased and capacitor currents will be zero during this mode.This is Mode-2 of circuit operation.

   When the source voltage magnitude goes above the sum of voltages across Cbulk1 and Cbulk2 the diode Dcharging gets forward biased and now the source charges the capacitors in series through the current limiting resistance and charging diode. During this period the source current will be the load current plus the capacitor charging current. The charging stops at the peak of input wave (neglecting the effect of source inductance) and the two capacitors will now have 50% of a.c peak value across each. This is Mode-3 of circuit operation.After the Mode-3 operation is over the circuit gets into Mode-2 followed by Mode-1.

   Thus the output wave will be a base level of about 160Volts (assuming 230V r.m.s line) with parts of sine half cycles riding above this base level. Obviously the output wave is nowhere near a DC and has too much of ripple to be called DC . This implies that there will be 100Hz amplitude modulation in the high frequency current in the lamp.

   This circuit forces the line to directly power the d.c side load for most of the cycle time thus extending the duration of conduction of diodes in each half cycle. Capacitors discharge for shorter duration than in the case of a simple full-bridge rectifier. That will result in lesser magnitude for the peak capacitor charging current. Both these aspects result in lower harmonic distortion and improved power factor at the input.

   The pSpice simulation result shown below illustrates what has been explained above.


 

2.  Data for Device Under Test

Item -- Electronic Ballast for 40W Fluorescent Lamp.
Brand Name -- xxxxx
Manufacturer -- xxxxx
Standards --Indian Standard BIS 13021 (Part 1 & 2)

Sample Details --
Sl.No.02030281 bearing following specifications
Input Voltage 230V, 50Hz
Input Voltage Range 90V-230V
Rated Input Current 190mA
Power Factor 0.9

Tests Conducted --
1) Circuit Power
2) Circuit Power Factor
3) Supply Current Waveform & Distortion
4) Lamp Current Symmetry & Crest Factor
5) Glow Discharge Period
6) Open Circuit Voltage
7) Lamp Removal Test
8) Minimum Operating Voltage
9) Maximum Cathode Lead Current Test
10) ‘Lamp Fails to Start’ Test

Test Equipment Used --

1) THS 710A Tektronix DSO and Wavestar Wave analysis software for the Scope.
2) Tektronix A 622 AC/DC Current Probe

3.  Test Results

    3.1    Circuit Power

    Measured Circuit Power = 41 Watts (Applied Voltage 229 Volts, 49.3Hz)

    3.2    Circuit Power Factor

    Measured Circuit Power factor = 0.916 (Applied Voltage 229 Volts, 49.3Hz)

3.3   Supply Current

Measured Supply Current = 195 milliAmps RMS at 229V
Measured THD = 43.4% with 4%THD in applied voltage
(See the chart and waveforms below for further details)

[2500 sample data points acquired by the Tektronix DSO were uploaded into MS EXCEL using the Wavestar software to prepare the above waveforms. Time axis covers ~ 50ms.]

See Table 1 below for complete details on the harmonic analysis of the supply voltage and supply current waveforms under rated conditions.

TABLE 1

Harmonic Analysis of Supply Voltage and Current Under Rated Voltage Condition

    [Comments on Input Current Shape - The charging current pulse is expected to occur somewhere near the 90 degree position in the sine wave. But it is offset in the waveform observed. Possible reasons are differences in the values of the two capacitors and differences in their leakage factors. pSpice simulation confirms that this kind of offset in the peak current position comes up with 20-30% differences in capacitor values and leakage resistance values.]

    3.4    Lamp Current Symmetry & Crest Factor

    The measured Lamp Current Waveform at 230V, 49.3 Hz condition is shown below.


    [2500 data points acquired by Tektronix Scope transferred to MS EXCEL to obtain the above waveform. 
    Time axis covers ~ 50ms.]

    Lamp Current RMS Value = 357 mA
    Lamp Current Envelope Peak = 850 mA
    Lamp Current Crest Factor = 2.38
    [Note:- BIS Specifies a maximum of 1.7 for Crest Factor in the interest of lamp life]
    Lamp Current Envelope Half Cycle Symmetry is found to be within 4% as per BIS specs.

    3.5    Glow Discharge Period

    BIS defines the glow discharge period as the time between the switching on instant and the instant at which thelamp current reaches 80% of its rated value. The recorded switching on transient at rated voltage is shown below. The time axis covers 1 second.

    The glow discharge period is measured to be ~200 ms which is well within the 400ms period allowed by the relevant BIS.

    3.6    Open Circuit Voltage Test
     
     

    The voltage appearing across the lamp during the time interval between the application of circuit voltage and striking of the tube is measured in this test. See the relevant oscilloscope waveform below. The Time axis covers 1 second.

    The maximum open circuit voltage appearing across the tube is measured to be 424 Volts in the case of a healthy Lamp.

    3.7    Lamp Removal Test

    The system was switched at 230V + 10% and the lamp was suddenly removed from the ballast without switching off the power supply. The ballast was left connected to the live supply for 1 hour. After 1 hour the lamp was reconnected. The ballast started up the lamp properly even without cycling the power switch and thereby passed the Lamp Removal Test.

    3.8    Minimum Operating Voltage

    Measured lowest voltage at which the Ballast could cold-start the Lamp = 90 V RMS
    Measured voltage at which the lamp will drop out = 60 V RMS

    3.9    Maximum Cathode Current under Normal Operation

    Measured Maximum Cathode Current during Starting = 2 Amps

    3.10    Lamp Fails Start

    This condition was simulated by connecting the black pair of wires to the cathode filament at one end of a healthy lamp and connecting the yellow pair of wires to the cathode filament at one end of a second healthy lamp.

Observations During this Test
1.Cathode Currents went to a maximum of 5A and the open circuit voltage touched 600V for about 9 seconds after switching on.

2.The Ballast went into a shut down mode after 9 seconds and the cathode currents and open circuit voltage tailed down to zero.

3.After being left connected to 230V supply in this mode for 1hr the ballast succeeded in lighting up a healthy lamp properly.

The oscillogram showing the shutdown process is shown below. The Time axis covers 20 Seconds.


 
 
 
 

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An Electronic Ballast for 40W Fluorescent Lamp with High Input Power Factor - Test Results     © 1994-2004 Suresh Kumar K.S